Xilinx Versal Prime Series ACAP for Mainstream Applications

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XDF VERSAL Presentation_Page_36

The Xilinx Versal Prime is one of Xilinx’s new ACAP chips parts focused on the data center and wired communication markets. Boasting a large amount of connectivity in a TSMC 7nm monolithic design, the new Xilinx Versal Prime is a significantly different product than the previous generation. Billed as a heterogeneous compute platform, the new ACAP design incorporates a new network on a chip, new Arm IP, faster programmable logic elements, and increased SerDes capabilities to meet the needs of many markets.

Xilinx Versal Prime

Billed as an ACAP, the Xilinx Versal Prime has a number of capabilities including Arm Cortex-A72 cores, an Arm Cortex-R5 real-time processor, DSP engines, and connectivity.

Xilinx Versal Prime Series
Xilinx Versal Prime Series

We have covered the ACAP before. Xilinx Project Everest and ACAP Strategy at 7nm and Xilinx ACAP Hot Chips 30 Keynote with Victor Peng. Those give a great background on the Xilinx ACAP platform that the new Versal Prime is built around.

Xilinx Versal ACAP Functional Diagram
Xilinx Versal ACAP Functional Diagram

Xilinx gave a few examples of how this is being used. It highlighted a radar beamforming example where the DSP Engines are doing the beamforming compute and the programmable gate arrays are handling status control and data formatting duties.

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XDF VERSAL Presentation_Page_37

Another market for the Xilinx Versal Prime can accelerate workloads directly on the network path. One example that the company highlighted is video transcoding. Twitch, the game streaming service, was on stage touting the benefits of the older generation UltraScale+ (16nm) that it uses to transcode 3 million streams at 1080 / 60fps using VP9. Twitch says that FPGAs give them around 30x the VP9 encoding performance over CPUs it was evaluating.

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XDF VERSAL Presentation_Page_38

Another example is storage acceleration, with the ability to handle 100GbE networking and compression/ encryption at low latencies. Storage is getting smarter, and many of the emerging vendors creating smart storage products are using Xilinx FPGAs.

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XDF VERSAL Presentation_Page_39

Another example is network acceleration such as open virtual switch (OVS) acceleration. FPGAs have been used for network processors for decades, so this is an easy one to see.

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XDF VERSAL Presentation_Page_40

The company highlighted a few other applications for the Versal Prime but the focus is clear: the Versal Prime is designed to be the next-generation general purpose computing platform for Xilinx.

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XDF VERSAL Presentation_Page_42

One of the key aspects to the ACAP push is that Xilinx is actively trying to displace Intel Xeon. By incorporating Arm cores, high-speed networking, and programmable logic, the company is betting that it can transition customers from going through a server to CPUs and instead offload entire applications to ACAPs like the Xilinx Versal Prime.

Xilinx Versal Performance

Here are some of the performance metrics that Xilinx is quoting for the overall Versal series. The Versal Prime it sees playing more in the non-AI inferencing data center markets as well as the “Wired” markets. For AI inferencing, the company has its Xilinx Versal AI Core launch product.

Xilinx Versal Performance Table At Launch
Xilinx Versal Performance Table At Launch

Part of the appeal of these types of products are the applications beyond simple compute. One example we wanted to highlight was on the “Wired” segment and encryption.

Xilinx Versal ACAP Wired Encryption Speeds

SmartNICs have become a big deal as they can offer high-end offload to PCIe NICs. Microsoft has been a big proponent of this approach and does inline inferencing as part of Microsoft Project BrainWave. Here is a table that Xilinx uses to talk about types of network interface cards:

Xilinx Types Of Network Cards
Xilinx Types Of Network Cards

The company believes it has a play with the Xilinx Versal Prime in the Type 2/ Type 3 SmartNIC space. One of the products, Mellanox Innova-2 with 25GbE and Xilinx FPGA we recently covered where that product used a pre-ACAP chip.

Xilinx Versal ACAPs are designed with SerDes for 10/25/40/50/100GbE and 600G FlexE core channelizable down to 10G channels and high-density 400GE/200GE/100GE
MAC/PCS/FEC. There is an up to 600G wire-rate encryption engine supporting MACSEC and IPSEC as well as bulk AES-GCM encryption for things like single-chip 1.0Tb/s+ network line cards for OTN and edge router applications, single-chip 2.4Tb/s+ encrypted Data Center interconnect (DCI) rack-mountable appliances, and 400Gb/s+ cable modem termination systems (CMTS) with per-subscriber encrypted tunnels for advanced business and residential services

Here are the performance metrics for AES256 encrypted traffic throughput. With the new Xilinx Versal series, the company can support up to 2.4Tb/s of AES256 traffic.

Xilinx Versal Wired Communication Encryption
Xilinx Versal Wired Communication Encryption

This is a big deal. Compared to the current/ previous generation Xilinx UltraScale+ product lines it means that the new ACAP can provide well over a 4x performance improvement. That also means that the ACAP can provide lower throughput but more intelligence via its programmable logic which means encryption offload does not preclude doing other types of compute on the SmartNIC.

Xilinx Versal Prime Series Launch SKUs

Here is the Xilinx Versal Prime launch SKUs. You can click on this to get more detail.

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XDF VERSAL Presentation_Page_60

With nine primary SKUs the Xilinx Versal Prime Series will scale to meet a number of customer application needs.

Final Words

The Xilinx Versal Prime series is still a monolithic die product. In the future, the company envisions 50 billion plus transistor multi-chip solutions. In the meantime, the ACAP architecture is really interesting providing a heterogeneous compute architecture. The heterogeneous compute architecture makes selecting SKUs even more important as the Xilinx Versal Prime scales connectivity, compute, and memory along with the SKU stack.

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