Intel is announcing a new process change that will happen, it says, in the next decade. If you purchase a CPU these days, you are most likely purchasing a chip that is on an organic substrate. In the future, Intel is planning to use a glass substrate that better matches silicon properties.
Next-Gen Intel Packaging with Glass Substrates Transition Outlined
This is Intel’s last slide of the disclosure, but it is perhaps the best summary, so we are re-ordering here. Glass will allow higher interconnect density, the ability to integrate optical interconnects, and more making it better. Intel did not really discuss what would not be as good with glass other than it had to invent a lot of technology to make it work.
Here are Intel’s packaging options today and into the future. Your average Core processor is probably in the first camp and we have discussed EMIB a lot. Foveros is really interesting. We first covered Foveros in 2018. On the pre-briefing call, Intel gave color to the slide adding that the high-volume manufacturing ramp would happen later in 2023. That gives some sense of where Intel is on delivering these to the mass market. Foveros Direct with direct copper-to-copper bonding is being touted as something coming “very soon.”
The Glass Core Substrate will do things like improve power delivery and get high-efficiency I/O on the package. Intel also is planning a glass-based coupling with integrated waveguides for the pluggable co-packaged optics that were shown at Intel Innovation 2022.
Intel showed a history of processor substrates. Organic and Organic with EMIB are going to continue for some time, but the high-end AI and data center CPUs seem to be the initial target for glass core.
The organic substrate one can think of as being very similar to standard PCB material. Glass in that context is more like fiberglass layers with a resin. We are simplifying this a lot to make it a bit more accessible.
Glass cores, by contrast, are a homogeneous material, unlike the fiberglass and resin materials used in organic substrates. It can be tuned to have thermal expansion similar to silicon which helps make larger form factor pacakages. Intel thinks it can get 10x or more through-hole density versus organic substrates. Intel also thinks it can get to lower loss and higher speed signaling like 448G.
Perhaps the fun one for folks on this slide is the TGV, or Through Glass Via. Many are familiar with Through Silicon Via or TSV, now that is being adapted to glass.
Final Words
This is one of those really cool Intel disclosures, and that is probably why Intel has it going live before Innovation 2023. Intel has these research products where there are teams working on technology like this for years, and it will not make it to production for years to come. Here is the progress thus far over the last decade, with a dedicated pathfinding effort that has been running for the last three years.
The middle and right images above are from the actual chips that have been tested using this new technology.
Overall, this is one of those really cool technology disclosures that is not going to make it into 2024 chips, but hopefully, we get to see it on a longer time horizon.
This is not that new. Everyone is working on glass substrates and as long as they don’t have it in production this is not really newsworthy.
Just look into FO-PLP (fan out panel level packaging) from Taiwanese OSATs like SPIL.
German company Manz is leading the equipment market for this.
I actually meant Powertech not SPIL but SPIL has talked about PLP research in the past too.
Current organic substrates are relatively strong, some what flexible and rather thin. For mobile devices, this is absolutely great. Moving to glass packaging in mobile I would see it being a challenge due to the amount of various forces being applied dynamically to the product that then transfers to the packaging. No one want to drop their phone and not only have their screen break but also their processor package shatter. For the data center, this is of course a non-issue outside of the one time physical installation. My presumption is that this would remain a data center centric technology for reasons beyond just cost.
I wonder what this new packing technology does to Z-height. Being able to include small capacitors and similar directly into the packaging would need room inside the packaging layer to fit. Being able to put such components inside the packaging and on top of it should be a remarkable improvement for high speed signal integrity.
TSV + TGV seems like an interesting combination that might permit some crazy vertical stacks of dies. On package memory comes to mine as a use-case for this.
Havin similar thermal properties to silicon is an interesting point for a system that’d got through numerous hot/cold cycles. This makes me wonder if such thermal stresses can break the bonding on existing organic packaging if pushed to the limit. I also wonder how this packaging would handle a diverse thermal loud, say chilled water near freezing running across a cold plate while the silicon dies are over 90 C. Such ranges can make various glass types shatter as one side is thermally expanding while the other side is contracting. This is dependent upon what type of glass is used and how much the internal wiring acts as a support mechanism.
Speaking of water cooling, I am some what surprised that active liquid cooling as part of the packaging wasn’t being explored. In terms of a material, glass seems like it could be forged to include paths for liquid to flow and cool internal portions of the package (think both sides of a die).
@Kevin G
I’d suspect that the specific grade or formula of glass that Intel plans to use will probably be similar to the glass called “Memcor” that’s been used in hard disks since the late 1990s. That stuff doesn’t expand much at all compared to earlier HDD media that used an aluminum platter. That very low thermal expansion coefficient plus its unbelievably smooth surfaces is what made Memcor glass standard fare for hard disk media. All very exciting when you add in the co-packaged optics/silicon photonics. This could one day lead to quantum-classical processor hybrids that use photonics for at least part of the compute process. Imagine your desktop in the 2040s or 2050s having a photonic quantum processor engine and traditional silicon GPU and APU all on the same package. I would like to see that someday. :-)