At Intel Vision 2022, the company showed off its massive Tofino 3 chip. This chip is designed to be a next-generation 64x 400GbE switch chip that has programmability built-in.
Massive 64x 400GbE Intel Tofino 3 Switch Chip at Vision 2022
Here is Patrick with the new massive chip. We have had photos with Intel Sapphire Rapids HBM and Intel Ponte Vecchio GPU packages that you can see for some sense of just how much larger this package is than the CPUs and GPUs that are coming out later this year. It is more similar in size to the NVIDIA H100 SXM5 module.
In terms of specs, this is a 25.6T switch that can handle up to 64x 400GbE MACs. Here is the spec table for Tofino 3. The one shown here is the 25.6T/56G version.
Another example for scale is the comparison to Tofino 2. Here we have Tofino 2 on the left and Tofino 3 on the right.
These chips come from the Intel-Barefoot acquisition. You may have seen us talk about these products in our Hands-on with the Intel Co-Packaged Optics and Silicon Photonics Switch article. Here is the video from that one:
One of the reasons that this chip is so large is really because of the I/O and PHYs. FCB10072 is the packaging. Usually the numbers are the number of pins. We did not count, but that FCB10072 would then indicate 10,072 pins. Just for a sense of scale, the bottom of the chip has a huge number of pins to connect to the switch. This is not a co-packaged optics switch, but this is a good example of why that will eventually happen.
Even the plastic shipping carrier could only handle 2-3 of these packages given their size.
Final Words
While we are not using co-packaged optics yet, largely because of some of the challenges with that and the industry working around the technical challenges, the Tofino 3 shows why this will happen. These switch packages are becoming huge and just looking at Tofino 2 versus Tofino 3 we can see how much larger the chips are getting in each generation.
Intel does not get much coverage on its Tofino switch chips, so we hope this is a good look at the large packages.
Hmmm…Maybe I need to invent the “chip lift”…When I semi-retired from IT (data center) chores last year @ age 64, I was still able to swap various Milan processors for testing (4000 pins?).
The data center did have a server lift…Can a “chip lift” be in our future?