In the FGPA industry, change is coming, and fast. Both Intel, courtesy of its Altera acquisition, and Xilinx are pushing to get next-generation platforms out to customers. These platforms are set to not just be bigger FPGAs, like the Xilinx Virtex UltraScale Plus VU19P. Instead, each company is adding new capabilities for higher-end transceivers, hardened logic integration, and a lower process node. We covered the Intel Agilex launched and shared our discussion with Dan McNamara head of the unit at Intel. Months later Intel is back saying they are shipping to customers.
Intel Agilex Next-Gen FPGAs Shipping to Microsoft and Others
This week, Intel announced that it is now shipping its next-gen FPGAs to a number of customers through its early access program. These EAP customers include Microsoft, Colorado Engineering, Inc, Mantaro Networks, and Silicom. We know that Microsoft is a major Intel FPGA customer as we saw in Microsoft Shows off Project BrainWave Persistent Inferencing from FPGA Cache and Microsoft Debuts Project Brainwave Access to Intel FPGAs for AI. Other customers like Silicom make popular adapters STH uses in the lab.
The Intel Agilex family will start with the 10nm F-series in 2019. This customer announcement follows Intel’s guidance that the Agilex first device availability will be in Q3. It seems like that is what is shipping in early access.
Although the first generation products are interesting, the I-series will add support for up to PCIe Gen5, and 112G transceivers. With PCIe Gen5, Intel is also pushing CXL as a coherent interface that Agilex will start to take advantage of atop of PCIe Gen5 infrastructure. The later M series will add support for DDR5 and Intel Optane DCPMM. Intel also sees Agilex as being able to use features like 3D SiP and EMIB to co-package IP such as Intel eASIC logic into designs.
One final quick note here is that Intel is continuing its integration of bfloat16 saying that Agilex is the only FPGA supporting hardened bfloat16.
