At FMS 2023, we saw a new CXL 2.0 switch concept from FADU. For those who do not know FADU, the company supplies SSDs to a number of large hyper-scale customers. CXL 2.0 is the first Compute Express Link revision where we get switching, so we are starting to see a number of those solutions. As an example, we recently showed theĀ XConn XC50256 CXL 2.0 Switch Chip Linked and Running at FMS 2023 so we wanted to cover this one as well. We also saw the company’s new PCIe Gen5 NVMe SSDs at the show.
FADU CXL 2.0 Switch at FMS 2023
Here is the CXL 2.0 switch demo running at FMS 2023. We were told this was a FPGA switch.
Here is a quick look at the box which looks like a FPGA platform with DIMMs on either side.
Here is another shot of the card with an adapter for an external network link.
Hopefully, at the next FMS we will get to see an ASIC-based solution.
FADU PCIe Gen5 NVMe SSDs at FMS 2023
Beyond the CXL 2.0 switch, the company also showed off its PCIe Gen5 NVMe SSDs and controllers.
The FC5161 storage platform is designed to cover a number of popular form factors including E1.S, U.2/U.3 and E3.S.
Here are a number of the drives. We can see E1.S is in 9.5mm, 15mm, and 25mm sizes.
As for specs, this is a PCIe Gen5 x4 drive that can support dual port (x2 x2) functionality and can scale up to 32TB.
Here is another view of the drives.
Here is a close-up of the FADU E1.S PCIe Gen5 NVMe SSD.
Here is a close-up of the E3.S also with SK hynix NAND and Micron DRAM.
The U.2/ U.3 platform looks very similar in terms of NAND, DRAM, and controller placement.
This was not the flashiest presentation, but these are important SSDs.
Final Words
Many of our readers have not heard of FADU. Still, we wanted to show folks the new NVMe SSDs since they are often used in hyper-scale data centers. While new PCIe Gen5 NVMe SSDs are interesting, perhaps the most impactful tech will be a CXL 2.0 switch as that is a new class of device. We really want to see the ASIC version running since that is going to be a competitive new field in the industry allowing memory pooling starting in 2024.
Latency? That should be mandatory on any article that mentions CXL…
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