Today we have the launch of the 2nd Generation Intel Xeon Scalable refresh SKUs. Make no mistake, this is Intel’s competitive side coming out. The original 2nd Gen Intel Xeon Scalable Launch happened in April 2019, about four months before the subsequent AMD EPYC 7002 series Rome Launch. Intel at the time knew it had some breathing room. AMD was four months behind but there was a catch. AMD was transitioning from PCIe Gen3 to Gen4 over a year before Intel will do the same. As a result, AMD platforms had to be re-designed with more robust motherboards to handle the higher platform throughput. Now that those systems have largely hit the market, we are seeing Intel make competitive moves. The first was discontinuing the 2nd Gen Intel Xeon Scalable M SKUs and lowering the price of competitive high-memory L SKUs. This “refresh” brings lower prices and more performance to more directly combat the AMD EPYC threat in the 32 and under high-volume server CPU market segments.
Let us be clear, a few years ago, getting 11-70% better performance per dollar across a line spanning from 8-28 cores we would have called this a new server processor series launch instead of a “refresh.” With 18 new SKUs and a different set of capabilities in many segments, one could call this an interim series launched between the original 2nd generation Intel Xeon Scalable and the next-generation Ice Lake Xeon series. In fact, one could look to the scope of this overhaul as support for the notion that the 2H20 Ice Lake Xeons are not going to launch in the first week of the second-half like the 1st generation Intel Xeon Scalable chips did. With this launch, Intel is effectively re-creating the market bi-furcation that we saw in the previous Xeon E5 and E7 series with the new SKUs making up the mainstream Xeon E5 series. It took a good amount of analysis to get there, but we can walk you through why that is.
In this piece, we are going to look at the new “refresh” SKUs. We are going to dissect Intel’s product strategy. We are then going to share some results benchmarking the Intel Xeon Gold 6248 and the new Xeon Gold 6248R to see just how much of an impact these changes have. We are going to end with some market analysis to outline the impacts both to the Intel v. AMD story but also what it means to the rest of the Intel portfolio. Let us be clear, this is not simply a mid-cycle 100MHz bump across some SKUs like we saw in the Xeon E5 generations. Instead, this is almost a re-positioning of the SKU stack for important market segments.
2nd Gen Intel Xeon Scalable Refresh Video Overview
We have a 13-minute video talking about some of the highlights in this comprehensive article.
The full article has significantly more detail and analysis than the video, but we know some prefer to listen rather than read.
2nd Gen Intel Xeon Scalable Refresh SKU Overview
Here is Intel’s official slide on the new parts which is the only slide we are going to use from Intel in this article. If that Intel Xeon Gold 6258R at $3,950 catches your eye, it should. In our AMD EPYC 7002 series launch article we said about the EPYC 7742: “AMD at around $7000 is essentially saying Intel needs to start their discounting at 73% to get competitive, and that is not taking into account using fewer servers.” (Source: here) Here we have Intel discounting Platinum 8280 by over 60% and calling it the Gold 6258R. That sets the tone for this table and the launch focused on mainstream servers:
Update: We asked for and received an updated version of the above chart from Intel.
Something will immediately stick out to readers. The Intel Xeon Silver 4215R supports Intel Optane DCPMM.
One will also notice that there are four non-R SKUs. First, one can see the Intel Xeon Gold 6256 and Gold 6250 which are lower-core count but frequency optimized SKUs with large caches, high TDP, and Turbo Boost speeds up to 4.5GHz. There is an extended temperature part the Intel Xeon Silver 4210T. One can also see what may be the most intriguing option, the Xeon Gold 6208U which is a “U” or single-socket part that Intel started offering in this generation to combat AMD.
One will also notice that Intel did not add any Xeon Platinum SKUs. These are really designed to be mainstream parts. Something we learned several weeks ago before leaks of these SKUs went public, is that the R parts are designed for one and two-socket servers. When we were preparing for our Supermicro 2049P-TN8R Review, the question arose, should we hold the review for a week or two and use the refresh parts instead. At that point, we were told that the new R parts did not support 4P operation even in the Intel Xeon Gold segment. Intel’s press release confirmed this:
The new processors, labeled with an “R,” “T,” or “U” suffix, are designed for dual-and single-socket mainstream and entry-level server systems. (Source: Intel)
Not only did Intel pass on updating Intel Xeon Platinum 8200 SKUs that are 8-socket capable, but it also removed the 4-socket capabilities from the Xeon Gold range for the first time since the Intel Xeon E5 and E7 series were unified with the Xeon Gold 6100 and Platinum 8100 series in 2017. Here is a slide from our 2017 Intel Xeon Scalable Processor Family: Platinum Gold Silver Bronze Naming Conventions piece:
That 4S capability seems to be removed from the new Gold 6200R and Gold 5200R parts. What this effectively means is that Intel has re-created the bifurcation lines and premiums associated with the Xeon E7 and Xeon E5-4xxx lines from years ago. For example, one can now buy a 2-socket only Xeon Gold 6258R for $3,950 list price or the 8-socket capable Intel Xeon Platinum 8280 for $10,009 which both have the same size cache, clock speeds, and TDP. This is going back to a Xeon E7-like 4-socket and 8-socket “tax” structure. Beyond the sockets for these 4P and 8P capable chips, one can also potentially pay a memory “tax” by purchasing “L” SKUs which has been greatly reduced recently as we covered in our 2nd Gen Intel Xeon Scalable M SKUs Discontinued piece. Intel is extracting value for higher-end configurations but it is worth mentioning that Intel still needs 4-sockets to get to the 64-cores that the AMD EPYC 7742 has. Essentially Intel is competing with its higher-end and higher-price 4-socket capable SKUs against the 2-socket AMD EPYC 7002 64-core parts.
Putting these new chips into context, it is important to keep that distinction in mind. The new “R” parts do not replace the older parts in the SKU stack. Instead, previously announced parts are still potentially used in 4-socket, 8-socket, and high-memory scenarios. Here is the mainstream socketed 2nd Generation Intel Xeon Scalable family with the two new frequency optimized SKUs along with the new refresh SKUs highlighted:
We wanted to point out here that Intel did more than add a few hundred MHz. Take the Intel Xeon Gold 6242 and Gold 6242R as examples where the price remains the same but little else. Intel increased the core count by 4. The base clock went up by 300MHz to 3.1GHz and maximum Turbo Frequencies moved up by 200MHz while the TDP also moved from 150W to 205W. There is another subtle difference. Previous 20-core SKUs like the Intel Xeon Gold 6230 had 27.5MB of L3 cache per processor. Many of the new chips, like the 20-core Xeon Gold 6242R have 35.75MB per chip. That is approximately a 30% increase in total cache or cache per core. Still, Intel is nowhere near the cache that AMD has, for example, the new AMD EPYC 7532 has 32 cores and 256MB of L3 cache or 8MB per core, but Intel is aware of its architectural deficit and is addressing the gap.
Another interesting note here. If you are a 4-socket Intel Xeon Gold buyer and pick the Gold 6248, a 20-core part you pay about $500 more for being able to use the chips in 4-socket servers or about 20% more. That is not all. The more expensive Gold 6248 has only 27.5MB of cache, not getting that Gold 6242R 30% cache per core bump. Base clocks are 600MHz lower at 2.5GHz versus 3.1GHz. Maximum Turbo Clocks are 200MHz lower at 3.9GHz versus 4.1GHz. The sole metric other than 4-socket capability that the older SKU is better at is its 150W TDP versus 205W TDP on the new part. The 4-socket “tax” is not just price, but it is also on specifications with the older parts.
Extending this further to look at how much Intel is charging for each 1GHz of base clock on a core, we can extrapolate these figures:
Just looking at the non-frequency optimized Intel Xeon Gold 6200R SKUs, we now get an average of $42.31 per 1 core at 1GHz base clock. Removing some of the frequency optimized parts such as the Intel Xeon Gold 6244 and Gold 6234 we previously had an average of $58.19. Using that methodology, we get around a 27.3% average price reduction in the mainstream portion of the Intel Xeon Gold 6200R versus the Gold 6200. For each “Cascade Lake” generation’s core at 1GHz in the segment, Intel has essentially discounted the price by more than a quarter. This is, of course, before the company’s deal, program, and contractual-based discounting.
Next, we are going to take a deep-dive into these changes. We are going to follow that up with performance testing of the Intel Xeon Gold 6248R’s in the cover photo versus the Gold 6248 launch SKUs to see if these numbers translate into a meaningful impact. We are then going to discuss the market impact of the refresh and give our final words.
This is the best coverage out there and I’ve skimmed Anand’s and Tom’s pieces. I wish you benchmarked more SKUs for it though but you’ve at least got something.
I’m with Teddy1974 and I read some analyst reports this morning too. I can’t believe this is free analysis.
Very nice article. What killing me is “Our review of the Xeon W-2295 is going to be online in the next few weeks” note inside it. I’ve slowly set on W-2295 as my workstation update (from old E5) hence would like to see your article rather soon than later.
Also W-22xx versus new “R” line, I think it’s matter of workstation preference. If the target software is more single-threaded oriented, then one may favor W-line for its higher turbo freq, however if the software is more multi-threaded and user is 100% sure about it, then investment into R line may make sense.
To put it bluntly, where is Cooper Lake? Wasn’t that supposed to be the stop-gap between Cascade Lake and Ice Lake? I know it was to be AI focused with BF16 support but is Intel squarely targeting only that segment for it? It’d be a means of getting a new platform out the door as well as negating several security issues that exist in Cascade Lake hardware.
Kevin, Cooper is coming. I think it is slightly different in market positioning at this point. All I can say for now is stay tuned to STH.
Too bad Patrick never mentioned DCPMM capabilities of these new CPUs
/s
Bored SysAdmin – 12 times in the article DCPMMs were mentioned including specific discussions. I am not sure what that comment means?
/s = sarcasm
/s is totally lost on me :-)
Great review. Thanks.
“For AMD, the road just got tougher. Contrary to many beliefs out there, Intel does not have to meet or beat AMD’s performance per dollar in markets primarily focused on compute. Intel just needs to be close.”
Really with Zen-3 Epyc/Milan sampling what’s going to happen after that and AMD’s Epyc/Rome pricing can go down even further what with those Zen-2 CCDs so easy to produce at such high Die/Wafer yields. AMD’s running a much leaner operation and TSMC’s process node R&D costs is amortized across an entire industry and not just AMD only. AMD’s response can be readily apparent and AMD’s economy of scale on those 8 core CCDs is testament to that. Intel’s 60%+ gross margins are no longer and if AMD’s Opteron competition was any indicator then that metric is going down further as well with Epyc at a level of parity in performance and at a price that Intel has now been forced to counter.
Currently as well some of AMD big Epic wins are going hand in hand with Nvidia’s GPU accelerators or even AMD’s Own GPU offerings for GPU compute that’s a bit more than any CPU can provide and Intel has not yet fielded any competition that has Nvidia shacking in it boots. AMD is really got the low overhead advantage in any price war what with Intel still on those monster monolithic designs that make the Die/Wafer yield calculator produce some sobering results.
The road has always been uphill for AMD and what’s new is that that hill is larger but AMD is about to crest for a good while and the going is not that bad when those CCDs only have 8 cores and mad Die/wafer yields and are scalable up to 64 cores on an MCM and probably higher if need be. Zen-3 is sampling and Zen-4 and Zen-5 have their own teams leapfrogging forward on a regular cadence. AMD has no large chip fab upkeep expenses in which to worry about and that’s good for any extra pricing latitude on AMD’s side. And this obvious move from Intel can be countered as AMD can afford to go lower to a point that high overhead Intel will have to go underwater for a while to match.
It’s maybe a little late for Intel as too much notice of Epyc/Rome is already producing results that Intel will not be able to quickly counter easily as in the past. I’d look to Intel’s large war chest only for the short term as Intel has to use more of that on process node and foundry retooling but price wars in the server market are certainly a rare occurrence that have the bean counters absolutely giddy since Epyc/Rome really turned up the competition after Epyc/Naples got AMD’s foot back in the door.
Really needed to be done on the Intel side, the parts were just not competitive for a large portion of the market. Intel-only shops began to look elsewhere, in some cases with larger refreshes went all in on Rome given the increase in performance and very significant cost savings.
Core count wise, they just can’t compete against the 64c Rome monsters. For VMware shops looking forward they also don’t have a 32c sku for optimized license utilization on smaller deployments.
Vendor hardware appliances aren’t as common as they use to be but almost all are exclusively Intel, with the newer models available better cost reductions.
@LowOverheadLarry: The only problem with your “theory” is the reality that Intel is making more money EVERY year that they have been producing 14nm chips!! Amd is NOT making nowhere near any money with Epyc and the market for 64 core chips is ridiculously small while Intel is still making many BILLIONS every year from 4,6 & 8 core laptop chips!!!
Epyc has been available for over 3 years while Intel has been producing inferior 14nm chips and they barely have over 5% market share for x86 servers worldwide!!
Amd has to start producing revenue in large numbers if they really want to compete with Intel in the long run.
The day of reckoning is in 2021 when 10nm Ice Lake comes out in huge numbers, then we will truly see how competitive Amd is with Intel in the server space as Intel still dominates with 5 year old 14nm xeon /laptop chips that the market is still buying in massive quantities regardless of the superiority of the Zen 2,3,4 platform!
More competitive pricing. Nice refresh meaning we don’t have to replace existing motherboards to accommodate these new SKUs for those of us on earlier releases of scalable. I’m on gen1 6130 16core 2.1 base 3.7 boost… and and to me it means eventual drop in prices on used gen1 6130 for my other open socket. Or I can sell off my existing single gwn1 6130 and upgrade to two refreshed 2020 silver 5000 series 20 or 24 core for not much more $ and use my existing mono.
Cooper lake will mean socket newer socket/mono required and new chipsets, so again I say it’s a nice refresh for those of us who adopted to earlier gen scalable.
AMD still kills it though with better price performance and features if ordering all new systems.
@lemans24, it’s not about Intel being large and making more money as we all know that Intel has money. But Intel is a high operating cost/high margins necessary business that has to have the 55%-60+% gross margins on higher markups in order to remain revenue positive and not drain its cash reserves.
It’s about AMD’s Epyc/Rome and soon to be Epyc/Milan and that modular CCD/DIE economy of scale and AMD not having any multi-billion dollar Fab up-keep costs. TSMC’s 7nm/smaller node R&D costs are not solely AMD’s burden as TSMC spreads that Fab/R&D upkeep cost across an entire industry whereas Intel has its expensive fabs’ upkeep and equally expensive process node R&D costs to shoulder on its own and that can drain cash reserves like nothing else for Intel.
AMD is fabbless and its Epyc/Rome and Epyc/Milan CCD 8 core die wafer yields are always going to be better than what Intel has with its monster monolithic Die production. AMD is such a low operating overhead business with, now, an Industry leading server CPU product line that’s levels above AMD’s past Opteron predecessors on the Price/Performance metric that got AMD up to around 23% of the server market share in the past. So now with Epyc/Rome and soon to be released Epyc/Milan Intel will have to contend with that and AMD’s Zen-4 Epyc/Genoa on 5nm by 2021 and Intel has already had/is planning layoffs because Intel’s high margin mark-ups are taking a hit and so will those revenues needed to run Intel’s high overhead operations.
AMD can turn a profit at 43% gross margins while Intel would loose billions at that gross margin level. So now Intel is dropping it’s server CPU markups like a brick just to match AMD’s Epyc/Rome price/performance metrics and AMD has Epyc/Milan ready and sampling to potential customers so Epyc/Rome can have its price lowered by AMD and AMD will not go revenue negative like Intel will be having to go in an attempt to stop the bleeding market share. Each and every week AMD racks up new Epyc/Rome cloud customer orders and Intel is still not able to ramp up enough production at 10nm and even 14nm to stop AMD’s market share gains.
Once the Wall Street Quants fully suss out Intel’s longer term Gross Margin basis points decline/decline potential Intel will really have to rely on its other non processor business units to maintain and server CPUs was/is Intel’s high margin holy cow that’s having to be priced significantly lower. So with each percentage of Sevrer market share lost to AMD that’s millions of dollars less revenue for Intel and millions of dollars more for AMD on the quarter to quarter balance sheets. TSMC’s 7nm and AMD’s modular/scalable CCDs are totally the very definition of economy of scale and since AMD is fabless and TSMC provides fab services to an entire market of fabless chip makers they all share in TSMC’s fab upkeep/node R&D costs amortizations.
You are not going to be able to go against AMD’s/TSMC’s economy of scale and that’s just economics there once AMD’s Epyc/Rome benchmarks proved that Intel is not able to compete at its traditional price points and the layoffs will continue at Intel as those massive operating overheads have to be reduced or Intel’s cash reserves will evaporate rather quickly. Chip fabs are the most hungry of operations to keep fed and at 7nm and lower that’s billions more compared to 14nm/above just to hit the ground running.